This invention relates to the post fabrication processing of semiconductor chips. After circuits are patterned on semiconductor wafers, and the wafers are separated into individual chips in the chip fabrication process, a number of steps are done to prepare the chip for use in a piece of electronic equipment, such as a computer.
In order to communicate data with the piece of electronic equipment, the semiconductor devices must be electrically connected to the piece of electronic equipment, most commonly by electrically and mechanically attaching the semiconductor device to a circuit board. This interconnection is typically done by attaching the semiconductor device to electrical leads, which are then attached to the circuit board, or by attaching the semiconductor device to a substrate, which is then attached to circuit board.
A common method for providing such mechanical and electrical connection is through the use of "bumps" Bumps are portions of conductive material placed on the interconnect pads of semiconductor devices. Since interconnect pads are commonly placed on an axis of alignment parallel and proximate to each edge of the semiconductor device, the bumps are situated in a similar pattern. Bumps serve as both conductive paths and mechanical standoffs. A discussion of bumps is contained in U.S. Pat. No. 4,510,017, issued on Apr. 9, 1985 to Barber.
If the bump is composed of a different material than the interconnect pad, the bump may be subject to the formation of intermetallic material, often referred to as "intermetallics". Intermetallics are materials formed at the interface between two metals by the diffusion of one metal into the other. The degree to which intermetallics form is dependent on a number of properties of the two metals.
Intermetallics may have undesirable electrical properties, such as poor or unpredictable conductivity, or undesirable mechanical properties, such as brittleness. Aluminum is a common choice for the interconnect pads and gold is a common material for the bumps. However, the combination of aluminum and gold is prone to the formation of intermetallics.
To slow the rate of formation of intermetallics, a thin layer of a "barrier metal" is often placed between the gold and the aluminum. A barrier metal is a metal that does not form harmful intermetallics with either of the two metals that would be in contact, but has desirable electrical and mechanical properties, such as high and predictable conductivity, ductility, and resistance to corrosion. Chromium and titanium tungsten alloy are common materials used for a barrier metal layer between gold and aluminum.
The barrier metal layer metal layer can be added as a thin layer over the entire semiconductor device by a process such as sputtering. After further processing, the portion of the barrier metal layer, except the portion lying under the bumps is removed. A common material for removing a barrier layer composed of titanium tungsten alloy is a 30% solution of hydrogen peroxide in water.
One problem with some common barrier metal materials, such as titanium tungsten alloys, is that the surface of the barrier metal layer may oxidize during subsequent processing steps. This oxide layer may prevent subsequent layers from adhering to the barrier layer. Therefore, a layer of another metal such as gold, which is not subject to oxidation, is sometimes applied immediately after the application of the barrier layer. If the bump material is gold, the oxidization preventing layer can also serve as a base on which the gold bump can be built, and for that reason it is often referred to as a "seed layer". Next, the bump is formed, and the portion of the seed layer not lying under the bumps is removed by later processing. A common material for removing a gold seed layer is potassium cyanide.
Mechanical and electrical connection are often accomplished by a single method. Compression bonding and solder bonding are two common methods for accomplishing mechanical and electrical connection. An example of compression bonding can be found in U.S. Pat. No. 4,000,842, issued Jan. 4, 1977 to Burns, and in U.S. Pat. No. 4,188,438, issued Feb. 12, 1980, also to Burns.
Compression bonding, however, requires mechanical force and heat to be applied to the bumped device. The Burns patents both specify a temperature of 550.degree. C. and a pressure of 100 grams per bump or 8 grams per square mil. Such high temperatures and pressures can damage the bumped device, the electrical leads, or the circuit board. Modern bumped devices may have as many as 600 bumps, which would require 60,000 grams of pressure according to the teaching of the Burns patents. This amount of force is sufficient to cause significant damage to semiconductor devices. Semiconductor devices are incapable of withstanding such pressure. The amount of pressure that must be applied at one time can be reduced by bonding only a portion of the bumps with each application of pressure. However, this results in a longer, more expensive manufacturing process, and may exposes the circuit board to the high temperature for a longer time.
In solder bonding, a bead of flowable metal, such as tin or tin-lead solder, is applied to each bump. A typical method of applying the flowable metal is illustrated in U.S. Pat. No. 3,625,837, issued Dec. 7, 1971 to Nelson et al. In Nelson et al., a calcium magnesium aluminosilicate glass layer is formed over the semiconductor device by a sputtering process. The portion of glass layer over the terminal areas is then etched away. Next, layers of chromium and copper are deposited on the entire semiconductor device. A mask is then formed over the semiconductor device using photoresist and photographic techniques to leave an opening in the photoresist layer that is slightly larger than the openings below them in the glass layer. The solder is then applied to the openings using electrodeposition. The portion of the copper and chromium layers that are exposed, that is that do not lie under the solder, are then removed by a suitable etchant. Heat is then applied, which causes the solder to form rounded bumps.
In recent years, the number of bumps on each chip has increased. One result has been that the nominal distance between the adjacent edges of adjacent bumps (hereinafter referred to as "nominal bump spacing") has decreased. In a typical modern semiconductor device, the nominal bump spacing is 0.006 in. (0.1524 mm), with some devices having a nominal bump spacing of 0.004 in. (0.1016 mm). The processes currently used to deposit solder beads on bumps, such as described by the Nelson patent, deposit the solder across the entire exposed surface of the bump, that is the upper and side surfaces of the bump.
This close spacing has made the bumped devices subject to a phenomenon known as "tin whiskering". Tin whiskering is the propensity of metals such as tin to grow thin crystals projecting outward from the portions of solder on the bumps. Tin whiskers tend to grow in the same direction as the crystals of the hardened solder. Tin whiskering is discussed in more detail in the article "A Model for the Spontaneous Growth of Zinc, Cadmium, and Tin Whiskers", by U. Lindborg, published on pages 181 through 186 in Acta Metallurgica, Vol. 24 (Pergamon Press, 1976). Tin whiskers growing on solder beads or on tin electronic leads may eventually grow long enough that they touch the adjacent solder bead or the adjacent electronic lead or they may touch a tin whisker growing from an adjacent solder bead or electronic lead. This can result in an electrical short circuit. Electrical short circuits caused by tin whiskers are particularly troublesome, because it is difficult to predict where and when they will occur.
Semiconductor chips are normally processed such that the circuitry is patterned on only one side of the substrate. The side on which the circuitry is patterned is called the active side of the substrate. The other side of the chip is called the passive side or the backside of the substrate.
Chip performance can be improved by processing the passive side of the substrate. Two operations that are often done to the passive side of the substrate are thinning and depositing a protective layer to the passive side of the substrate. Thinning is typically done by a lapping process in which an abrasive substance removes material from the passive side of the substrate. Thinning may also be done by the action of chemicals. This is typically done during the fabrication process. If it is done during the fabrication process, the active side of the semiconductor device needs to be protected from the chemical, which adds and extra process step.
The material deposited on the passive side of the substrate is typically a conductor such as gold, and is typically deposited by electrodeposition.
In summary, the post fabrication processing of bumped semiconductor devices includes the steps of placing a barrier metal layer on the interconnect pads of the semiconductor device; applying a seed layer on top of the barrier metal layer; depositing a bump on the portion of the seed layer which lie over the interconnect pads of the semiconductor device; depositing a solder bead over the exposed surfaces of the bump; optionally, depositing a coating on the passive side of the substrate; removing the portion of the seed layer which does not lie under the bumps; and removing the portion of the barrier metal layer with a 30% hydrogen peroxide solution. We now proceed to a summary of the invention.